1. Technical Field
The disclosure is related to a package carrier, and particularly to a package carrier having an under bump metallurgic layer (UBM layer).
2. Background Art
As technology advances, all sorts of electronic products are developed towards multifunction, characterized by miniaturization, light weight, thin thickness, high speed, high performance, high density, low cost and the like. Hence, in order for chips in electronic products to be able to transmit or receive more signals, contacts electrically connecting chips and package carriers are also developed towards high density.
The flip chip bonding technology mainly arranges a plurality of pads on the chip in area array to respectively dispose the pads on the active surface of the chip, and then a UBM layer and conductive bumps are respectively formed in sequence on the pads. Afterwards, the conductive bumps are used to connect with the pads on the package carrier so that the chip is electrically connected to the package carrier through the conductive bumps. Since the conductive bumps are arranged on the active surface of the chip in area array, the flip chip bonding technology is suitable for the chip package structure of high contact count and high contact density, such as the flip chip/ball grid array type package which has been extensively used in the semiconductor package industry. Additionally, compared with the wire bonding technology, the conductive bumps can provide a shorter transmission path between the chip and the package carrier, such that the flip chip bonding technology can enhance the electrical performance of the chip package.
FIG. 1 is a schematic cross-sectional view of a conventional flip chip package. Referring to FIG. 1, a conventional flip chip package 1 includes a chip 10, a substrate 20, an under bump metallurgic (UBM) layer 30, a conductive bump 40 and an underfill 50. The chip 10 has a chip pad 12, a wire structure 14 connected with the chip pad 12, and a first passivation layer 16. The first passivation layer 16 has an opening 16A to expose a portion of the chip pad 12. The UBM layer 30 is disposed between the chip pad 12 and the conductive bump 40 and constituted by composite metal layers, i.e., an adhesive layer 32, a carrier layer 34 and a wetting layer 36. The substrate 20 has a substrate pad 22 and a second passivation layer 24. The chip pad 12 and the substrate pad 22 corresponding thereto can render the chip 10 and the substrate 20 electrically connected with each other through the conductive bump 40. The underfill 50 is disposed between the chip 10 and the substrate 20 and encapsulates the conductive bump 40.
It should be noted that as the package technology develops to be more precise, the size of the conductive bump 40 also becomes smaller. When the chip 10 accelerates its operation, a large amount of current is formed passing through the UBM layer 30, such that current crowding would occur close to a region 18 of the wire structure 14. In other words, the current density in this region increases, resulting in grain boundary diffusion among metal atoms, i.e., electro-migration. Consequently, the metal atoms of the UBM layer 30 are lost due to electro-migration caused by long periods of current influence, and even voids may be formed and cracks may be extended. Especially at the end close to the wire structure 14, more metal atoms are lost than at the end far away from the wire structure 14, thus affecting the reliability of the flip chip package 1.